1. Field of the Invention
The field of the present invention is semiconductor packaging.
2. Description of the Related Art
One type of conventional semiconductor package includes a rectangular semiconductor die having an active surface with bond pads thereon, an inactive surface opposite the active surface, and four planar side surfaces between the active and inactive surfaces. The inactive surface is attached to a substrate of the semiconductor package with a layer of a die attach adhesive. The substrate includes a first surface and an opposite second surface, each of which includes a plurality of circuit patterns. The circuit patterns of the first surface are electrically coupled to the circuit patterns of the second surface by vias through the substrate. The bond pads of the semiconductor die are electrically coupled to the circuit patterns of the first surface of the substrate by conductive wires. The semiconductor die and the first surface of the substrate are covered by a plastic encapsulant. Finally, a plurality of solder balls are fused to the circuit patterns of the second surface of the substrate to serve as external interconnects for the semiconductor package.
This conventional semiconductor package has several drawbacks. One drawback of the conventional semiconductor package arises from the relatively-long metal wires that electrically couple the semiconductor die to the substrate. The greater the length of the wire, the lesser the electrical efficiency of the package. Restrictions on the length of the metal wires limits the arrangement of the bond pads of the semiconductor die and the design of the electrically conductive circuit patterns of the substrate. Moreover, since the substrate is much larger than the semiconductor die, the conventional semiconductor package is relatively large, which is undesirable in certain applications. Finally, because the semiconductor die is covered by the encapsulant, heat radiation from the semiconductor die is made more difficult.
To reduce the vertical height of the semiconductor package, i.e., the package's thickness between the bottom of the solder balls and the top surface of the encapsulant, the semiconductor die is thinned by a process of grinding, polishing, or etching the inactive surface of the semiconductor die prior to the severing of the semiconductor die from a semiconductor wafer. The thickness of the semiconductor dies of the wafer between their respective active and inactive surfaces is approximately 29 mils prior to the thinning process, and is approximately 6 mils after the thinning process. After the thinning process, the semiconductor dies are singulated from the wafer. However, the reduced thickness of the semiconductor dies creates problems during package assembly, because the thinned wafer and singulated semiconductor dies are difficult to handle, and are susceptible to breakage.
Accordingly, an improved semiconductor package is desirable.